Predicting the effects of cycle time variability on the efficiency of electronics assembly mixed-model, zero-buffer flow processing lines

摘要

The research literature emphasises the need to use flow processing lines to undertake processing and assembly within low demand volume, high product variety electronics manufacturing environments that have significant levels of product, process and demand variability to contend with. Currently, the presence of such high levels of product, process and demand variability prevents the design of efficient flow processing lines by significantly disrupting the synchronisation of materials movement between work stations, resulting in under-utilisation of manufacturing resources, long lead times and poor delivery reliability. In order to ensure efficient flow processing under such conditions, a range of methods has been developed for both reducing levels of variability and for managing the effects of variability. However, ensuring the effective use of each of these methods requires detailed knowledge of the effects this variability has on the resource requirements of individual workstations. The current research is concerned with the development of predictive models that can quantitatively estimate the amounts of blocking and waiting, on individual workstations along a flow line, arising from differences in cycle times between these workstations. Information derived from such models are able to enable more precise and effective use of the methods used to off-set the effects of cycle time variability.