HYBRID BUCK-LINEAR (HBL) TECHNIQUE FOR ENHANCED DIP VOLTAGE AND TRANSIENT RESPONSE IN LOAD-PREPARATION BUCK (LPB) CONVERTER

摘要

A hybrid buck-linear (HBL) technique in a load-preparation buck (LPB) converter for system-on-a-chip (SoC) applications is proposed in this paper. The proposed converter with the hybrid operation can effectively enhance the transient response with a small dip voltage and fast transient recovery time in case of a sudden load variation in SoC system. In addition, compared with the parallel operation of the buck converter and LDO regulator, the HBL technique helps realize the high power conversion efficiency in the LPB converter. An auxiliary power switch assures the hybrid operation, which is only activated in the load transient period. Experimental results demonstrate that the improvements in transient dip voltage and recovery time are 170 mV (53%) and 50 μs (63%), respectively, as well as the 8% efficiency enhancement. The chip is fabricated by 0.25 μm CMOS process with a peak efficiency of 95% in SoC applications.