Effects of Gate Line Width Roughness on Threshold-Voltage Fluctuation Among Short-Channel Transistors at High Drain Voltage

摘要

We have experimentally evaluated the effects of the gate line width roughness (LWR) on the electrical characteristics of scaled n-MOSFETs. A larger gate LWR enhances the fluctuation in the subthreshold leakage current in short-channel n-MOSFETs even when the average gate length is maintained. Consequently, suppressing the gate LWR effectively reduces the variability in the threshold voltage of the scaled n-MOSFETs for a high drain voltage.