Extraction Technique of Trap Densities in Thin Films and at Insulator Interfaces of Thin-Film Transistors

摘要

We have developed an extraction technique of trap densities in thin films and at insulator interfaces of thin-film transistors (TFTs). These trap densities can be extracted and separated from capacitance–voltage and current–voltage characteristics by numerically calculating $Q = CV$ , Poisson equation, carrier density equations, and Gauss' law. The outstanding advantages are intuitive understandability and a simple algorithm. The validity is confirmed using device simulation, and actual trap densities are extracted for a high-temperature poly-Si TFT.