AS MAJOR FACTORS in overall fabrication costs, the testing and diagnosis of analog and mixed-signal ICs have increasingly attracted the interest of manufacturers and designers. Advances in technology and IC design techniques have allowed for sophisticated analog and digital functions in a single chip, in which switched-capacitor (SC) networks perform fundamental operations such as filtering and A/D and D/A conversion. As a result, considerable effort has gone into improving test coverage and testable circuit design in general and SC networks in particular. Basically, two types of errors occur during manufacturing: catastrophic errors, or hard faults, caused by a bridge or a lack of connection; and parametric errors, or soft faults, caused by process variations. Catastrophic errors, which significantly degrade circuit performance, are detectable by means of power-supply current monitoring (I_(DDQ) testing). Two types of process variations cause parametric errors: global and local. Global variations cause systematic errors that occur throughout the IC. Local variations are small random differences between physically adjacent devices, leading to component mismatch and, in the case of SC filters, causing errors in their transfer function coefficients, which are determined by capacitance ratios. Local parametric faults are generally more difficult to detect and locate than global parametric faults. Researchers have proposed various methodologies for testing SC filters to detect parametric faults. The "Related work" sidebar summarizes these techniques.
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