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Validating PowerPC microprocessor custom memories

机译:Validating PowerPC microprocessor custom memories

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摘要

abstract_textpDue to the high cost of correcting errors in a final product, there is a growing impetus in industry towards methodologies that can yield correct designs in the first manufacturing run. Design validation methodologies that combine simulation techniques with formal reasoning can be effective in ensuring correct operation of software and hardware systems. We show why simulation is necessary to complement formal mathematical reasoning in verifying certain classes of custom designed circuits. We present a validation methodology for PowerPC custom memories based on symbolic simulation./p/abstract_text

著录项

  • 来源
    《ieee design & test of computers 》 |2000年第4期| 61-76| 共16页
  • 作者单位

    Motorola Inc, Somerset PowerPC Design Ctr, ASP Adv Tools & Methodol Grp, Austin, TX USA;

    Motorola Inc, Architecture & Syst Platforms Div, Semicond Prod Sector, Austin, TX USA;

    Univ Texas, Dept Comp Sci, Austin, TX 78712 USAUniv Texas, Dept Elect & Comp Engn, Austin, TX 78712 USA;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);
  • 原文格式 PDF
  • 正文语种 英语
  • 中图分类
  • 关键词

    FORMAL VERIFICATION;

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