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首页> 外文期刊>ieee design & test of computers >Power-/energy-efficient BIST schemes for processor data paths
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Power-/energy-efficient BIST schemes for processor data paths

机译:Power-/energy-efficient BIST schemes for processor data paths

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摘要

abstract_textpProcessor core power is primarily consumed in a data path consisting of high-activity functional modules. We propose low-power/energy BIST schemes for data path architectures built around the most common combinations of multipliers, adders, ALUs, and shifters./p/abstract_text

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