Mitigating the Soft Errors and Controlling the Voltage Level of VLSI Devices—MSCV

摘要

The dynamic voltage restorer and controller performance determine the solely. For high performances of the controller a new algorithm is designed with desirable steady state and robustness for VLSI device control. The transient characteristic shows the circuit performances and the improvementof it in Cadence virtuoso environment of 180 nm CMOS process. In this paper, for voltage restorer in regulation the voltage controller is proposed in the frame of stationary. To achieve high performances in fundamental control of voltage in positive and negative sequence, P+ resonantcontroller is designed with high gains around 55 Hz. In traditional synchronous proportional integral regulators are not required methods in transformations of frames. However, in parameter variation a controller is designed for error free purposes with explicit robustness. The procedure ofcontroller to achieve high gain is synthesized through the selection of weight functions. A thorough performance comparison and discussion of controller are carried out in both transient and steady-state conditions in ADL using Cadence technologies. Finally, in laboratory 8-kV medium voltagelevel of voltage restorer system extensively the controller is tested with various voltage sags and loading conditions.