Performance Analysis of Various Multipliers Using 8T-full Adder with 180nm Technology

摘要

Background: This paper presents the comparative study of power dissipation, delay andpower delay product (PDP) of different full adders and multiplier designs.Methods: Full adder is the fundamental operation for any processors, DSP architectures and VLSIsystems. Here ten different full adder structures were analyzed for their best performance using aMentor Graphics tool with 180nm technology.Results: From the analysis result high performance full adder is extracted for further higher leveldesigns. 8T full adder exhibits high speed, low power delay and low power delay product andhence it is considered to construct four different multiplier designs, such as Array multiplier,Baugh Wooley multiplier, Braun multiplier and Wallace Tree multiplier. These different structuresof multipliers were designed using 8T full adder and simulated using Mentor Graphics tool in aconstant W/L aspect ratio.Conclusion: From the analysis, it is concluded that Wallace Tree multiplier is the high speed multiplierbut dissipates comparatively high power. Baugh Wooley multiplier dissipates less power butexhibits more time delay and low PDP.