Harmonic Reduction For Adjustable Speed Drive With Reduced Switch Topology

摘要

This paper intends design and operational principle of a three phase modified nine level inverter fed induction motor (IM) to reduce Total Harmonic Distortion (THD). The general purpose of multilevel inverter is to achieve less THD, hold of high voltage and power, but number of switches for the inverter is required due to increase in levels. Reduced switch topology for cascaded H-Bridge Multilevel inverter is proposed to overcome the disadvantage of separate DC sources, voltage stress, increase in number of switches and switching loss. A Space Vector Pulse Width Modulation (SVPWM) technique and Multiple Sinusoidal Pulse Width Modulation for MLIfed IM is used for minimizing THD of MLI voltage harmonics and the stator current harmonics. FFT analysis is used to analyse THD. The proposed topology is verified by using MATLAB/SIMULINK.