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A digitally programmable gain amplifier for ultra-low-power applications

机译:用于超低功耗应用的数字可编程增益放大器

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This paper presents a subthreshold CMOS digitally programmable gain amplifier for ultra-low-power signal processing applications. The subthreshold MOS transistor technique is used to achieve low-power consumption of the proposed circuit. The structure is constituted by a class-AB current amplifier which can handle a wide input signal. The gain of the digitally programmable gain amplifier is regulated by using current digital signal level without switch requirements; hence low circuit complexity, low power consumption and low number of devices can be obtained. Also both non-inverting and inverting amplifiers can be easily obtained into one single topology. Using additional resistors to convert the current to the voltage, single-input and differential-input digitally programmable voltage gain amplifiers can be obtained. The proposed circuit is simulated using 0.5 mu m CMOS technology. The simulation results show that the proposed circuit consumes very low power from +/- 1.2 V power supply.
机译:本文提出了一种用于超低功耗信号处理应用的亚阈值CMOS数字可编程增益放大器。亚阈值MOS晶体管技术用于实现所建议电路的低功耗。该结构由可处理宽输入信号的AB类电流放大器构成。数字可编程增益放大器的增益是通过使用当前数字信号电平来调节的,而无需开关要求;因此,可以获得较低的电路复杂度,较低的功耗和较少的设备数量。同样,同相和反相放大器也可以很容易地获得一个单一的拓扑。使用额外的电阻器将电流转换为电压,可以获得单输入和差分输入数字可编程电压增益放大器。所提出的电路是使用0.5μmCMOS技术进行仿真的。仿真结果表明,所提出的电路从+/- 1.2 V电源消耗的功率非常低。

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