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首页> 外文期刊>電子情報通信学会技術研究報告. VLSI設計技術. VLSI Design Technologies >Two-step improved-breaking-off-search motion estimation algorithm and low-power 0.13-μm CMOS motion estimators for MPEG-2 encoding
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Two-step improved-breaking-off-search motion estimation algorithm and low-power 0.13-μm CMOS motion estimators for MPEG-2 encoding

机译:用于MPEG-2编码的两步改进 - 断开搜索运动估计算法和低功耗0.13-μmCMOS运动估计

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摘要

Power dissipation (P) of an absolute difference (AD) circuit has been required to reduce as low as 0.1 W. The "tow-step improved-breaking-off-search (2S-IBOS)" method, which can drastically reduces the number of block matchings (N{sub}b) to 1/3 that of the full-search (FS) method, and maintain the visual quality at the same level with FS. A new 0.13-μm CMOS Wallace-tree type Ad circuit for MPEG-2, MP@ML was designed using 2S-IBOS. P was reduced to 83 mW, which is only 14.4% that of the previous designed AD circuit using FS. With a low-bit resolution (4 bit/pixel) technology, P was further reduced to 44 mW.
机译:绝对差值(AD)电路的功耗(P)已被要求减少低至0.1W。“牵引步骤改进 - 断开搜索(2S-IBOS)”方法,这可能会大大减少数量 块匹配(n {sub} b)到全搜索(fs)方法的1/3,并将视觉质量与fs相同。 使用2S-IBOS设计了用于MPEG-2的新的0.13-μmCMOS华莱士树型AD电路,ML设计。 P减少到83兆瓦,仅使用FS的设计广告电路仅为14.4%。 具有低位分辨率(4位/像素)技术,P进一步减少到44兆瓦。

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