Stochastic Number Generation with Internal Signals of Peripheral Logic Circuits

摘要

Stochastic computing (SC), which is an approximate computation with probabilities, has attracted attention because it has distinct advantages in hardware cost and fault tolerance. In SC, numbers to be calculated are represented by the probabilities of one occurring in binary sequences and the numbers are transformed from binary (or deterministic) numbers by stochastic number generators (SNGs). In this paper, we propose a new SC scheme in which SNGs of an SC circuit exploit the internal signals of its peripheral logic circuits for generating random numbers. Furthermore, we propose an algorithm for appropriately selecting signal lines so as to reduce both of conversion errors and correlation-induced errors.