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A single-chip CMOS transceiver front-end for DCS-1800 wireless communications

机译:用于DCS-1800无线通信的单芯片CMOS收发器前端

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This work describes the design and realization of a low voltage single-chip wireless transceiver front-end in a standard 0.25 μm CMOS technology. The presented prototype integrates the LNA, down-converters, VCO, quadrature generator, up-converter and pre-amplifier on a single die. A high level of integration is achieved by using a low-IF topology for reception, a direct quadrature up-conversion topology for transmission and an oscillator with on-chip integrated inductor. The final objective of this design is to develop a complete transceiver system for wireless communications at 1.8 GHz that can be built with a minimum of surrounding components: only an antenna, a duplexer, a power amplifier and a baseband signal processing chip. The presented circuit consumes 240mW from a 2.5 V supply and occupies a die area of 8.6mm{sup}2.
机译:这项工作描述了采用标准0.25μmCMOS技术的低压单芯片无线收发器前端的设计和实现。所展示的原型在单个芯片上集成了LNA,下变频器,VCO,正交发生器,上变频器和前置放大器。通过使用低IF拓扑用于接收,直接正交上变频拓扑用于发送以及带有片上集成电感器的振荡器,可以实现高集成度。该设计的最终目标是开发一个完整的用于1.8 GHz无线通信的收发器系统,该系统可以用最少的外围组件构建:仅包括天线,双工器,功率放大器和基带信号处理芯片。所示电路从2.5 V电源消耗240mW功率,并占据8.6mm {sup} 2的管芯面积。

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