Fabrication technology for ultrahigh-speed decananometer-gate InP-based HEMTs

摘要

We fabricated decananometer-gate InP-based lattice-matched (In{sub}0.52Al{sub}0.48As/In{sub}0.53Ga{sub}0.47As) and pseudomorphic (In{sub}0.52Al{sub}0.48As/In{sub}0.7Ga{sub}0.3As) high electron mobility transistors (HEMTs) with a very short gate-channel distance. Using the two-step-recessed gate technique, we reduced the gate-channel distance to 4 nm. We found that the cutoff frequency f{sub}T increases with decreasing gate-channel distance d. This phenomenon can be explained by an increase in electron velocity under the gate with decreasing d. We obtained an f{sub}T of 500 GHz for a 25-nm-gate lattice-matched HEMT with a d of 4 nm. We also fabricated 25-nm-gate pseudomorphic HEMTs using the same processing technique, and obtained an f{sub}T of 562 GHz with a d of 4 nm. This f{sub}T is the highest value ever reported for any transistor.