Adaptive array antenna experimental system based on FPGAs and its evaluation through implementation of MRC beamformer

摘要

This paper introduces the evaluation system developed for adaptive array antenna technologies improving the former system. This system is designed with DSP processor based on FPGAs (Field Programmable Gate Array) for real-time parallel processing. It incorporates high performance and high density FPGAs, which enables the complex logics of adaptive antenna signal processing. This system also provides IF sampling and digital down conversion function in real-time, which are key features of software defined radio. This paper presents the design concept and features in detail. In addition, for the operation verification, Maximum Ratio Combining (MRC) beamformer is implemented on this system and simple experiment is performed. In this paper, its hardware configuration and FPGA-based DSP implementation are described.