Effect of number of processor on the cache hit rate in symmetric multiprocessor environment

摘要

Processor performs operations on operands faster than the access time of large capacity main memory causing bottleneck in a multiprocessing systems. A possible design alternative for improving the performance of a multiprocessor system is to insert a private cache between each processor and the shared memory. Caches in multiprocessing environment introduce the cache coherence problem. Different cache coherence protocols are developed to solve this problem by maintaining a uniform state for each cache block of data. The purpose of this paper is to investigate the influence of number of processor on the cache hit rate for the Snoopy Cache Coherence Protocols (MESI and Dragon) in Symmetric Multiprocessor environment.