HEMT Based 6T Static Random Access Memory Cell Design for High Speed Applications

摘要

In this paper 6T SRAM Cell has been designed using HEMT device. Due to high mobility of HEMT, it is more suitable candidate for high speed memories design. Read delay and write delay have been calculated for SRAM cell. The results of proposed HEMT based SRAM cell design are comparedand with reported data for the validation of design approach. Based on the analysis of SRAM cell, read delay for 5 GHz was 38.82 ps and the write delay was 9.82 ps. The read and write operations are also verified using TCAD tool for the proposed design.