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Multicore Parallelization of Kohn-Sham Theory

机译:Kohn-Sham理论的多芯并行化

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A multicore parallelization of Kohn-Sham theory is described, using standard commodity multisocket and multisocket/multicore shared-memory processors. Near-linear scaling of the parallel parts of the code was observed up to the maximum of sixteen cores that were available for benchmarking, and an order of magnitude reduction in run time was achieved running using sixteen threads on a quad-socket quad-core Xeon system. The speed-ups achieved using multisocket/multicore processors were competitive with those achieved using numerical accelerator cards
机译:使用标准商品MULTIOSOCK和MULTIOSOCK / MOLLICORE SHARED-MEMORT处理器描述了Kohn-Sham理论的多核并行化。 代码的并行部分的近线性缩放最多可用于基准测试的最大值,并且在四套筒四核Xeon上使用十六个线程实现运行时间的数量级减少级 系统。 使用多机器/多核处理器实现的速度与使用数字加速器卡实现的速度竞争

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