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Multicore Parallelization of Kohn-Sham Theory

机译:Kohn-Sham理论的多核并行化

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摘要

A multicore parallelization of Kohn-Sham theory is described, using standard commodity multisocket and multisocket/multicore shared-memory processors. Near-linear scaling of the parallel parts of the code was observed up to the maximum of sixteen cores that were available for benchmarking, and an order of magnitude reduction in run time was achieved running using sixteen threads on a quad-socket quad-core Xeon system. The speed-ups achieved using multisocket/multicore processors were competitive with those achieved using numerical accelerator cards
机译:描述了使用标准的商品多插槽和多插槽/多核共享内存处理器的Kohn-Sham理论的多核并行化。观察到代码并行部分的近线性缩放,直到最多可用于基准测试的16个内核为止,并且在四路四核Xeon上使用16个线程运行,运行时间减少了一个数量级系统。使用多插槽/多核处理器实现的提速与使用数字加速卡实现的提速具有竞争力

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