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Development of a Robust Carrier Synchronizer for High Dynamic and Low Signal to Noise Ratio Signals in GPS Receivers

机译:高压载波同步器的开发用于GPS接收器中的高动态和低信号到噪声比信号

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摘要

In this paper, a robust carrier recovery loop for high dynamic and weak signals in GPS receivers is proposed. To achieve optimal tracking performance at synchronization loops, different methods are investigated. Since phase jitter sources are identified at the receiver, suitable controller coefficients are calculated and used in carrier and timing recovery loops. This improvement induces higher speed and lower variance of jitter in acquisition and tracking modes, respectively. Furthermore, this simple design can obviate the need of large digital filters or complex circuits such as wavelet de-noising filters in the loop. To extend the linear range of the phase estimator, phase unwrapper unit is used which can improve loop tracking ability and resolve Kalman filter difficulties. To compensate the cycle-slip phenomenon, a novel recursive algorithm is introduced which causes better performance for low CNR signals and high dynamic environments. Simulation results show the effectiveness of the proposed architecture for different Doppler rates and CNRs. Moreover, the results indicate good matching between fixed-point FPGA implementation and floating-point simulation.
机译:本文提出了一种用于GPS接收器中的高动态和弱信号的强大载波恢复环。为实现同步环路的最佳跟踪性能,研究了不同的方法。由于在接收器处识别相位抖动源,因此计算并在载波和定时恢复环中使用合适的控制器系数。这种改进分别在采集和跟踪模式中引起抖动的更高速度和更低的变化。此外,这种简单的设计可以避免大量数字滤波器或复杂电路,例如环中的小波脱光滤波器。为了延长相位估计器的线性范围,使用相位未包装器单元,其可以提高环路跟踪能力并解决卡尔曼滤波器困难。为了补偿循环滑移现象,引入了一种新的递归算法,这导致低CNR信号和高动态环境的性能更好。仿真结果表明了拟议架构的不同多普勒率和CNRS的有效性。此外,结果表明了定点FPGA实现与浮点模拟之间的良好匹配。

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