Reducing Context Switching Overhead by Processor Architecture Modification

摘要

The operating system is an essential component of the system software in any conventional system that even includes Real-time system (RTS) and the OS running on RTS refered to as RTOS. But, in case of real-time systems, the time at which output produced is of major concern, especially in case of Hard RTS the deadlines are to be met strictly, failure of which leads to disasters. Multi-tasking, one of the major attribute of OS involves context-switching. The switching between tasks involves saving the context of the current running task in to the stack and restoring the context of the task to be executed. The context of the task involves the value of Program counter, temporary register values, global pointer value, stack pointer value. The process of storing and restoring of context from memory to processor or viceversa is referred to as Context-Switching. Context-Switching introduces significant amount of overhead to the overall task execution time, as transfer of contents between processor and memory is a bit time consuming. This overhead has to be minimized by avoiding usage of external memory during context-switching, so that the deadlines are met i.e. output is produced at stipulated time. This paper focuses on reducing the overhead by modifying the architecture of the processor by adding additional register files in to the existing register bank of processor so that context can be saved on processor itself, thereby additional clock cycles for storing and restoring from memory is eliminated. The architecture is developed in VHDL. A co-operative RTOS is developed along with the applications in C language to test the new architecture. Modified GCC compiler is used for compiling the executable files. XC3S1600E FPGA is used as target board and the results are observed on the hyper-terminal of PC in form of time-stampings.