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首页> 外文期刊>Advanced Science Letters >Design of One-Bit Comparator Using Multilayer in Quantum-Dot Cellular Automata
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Design of One-Bit Comparator Using Multilayer in Quantum-Dot Cellular Automata

机译:Quantum-Dot Cellular自动机中使用多层比较器的设计

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摘要

One-bit comparator circuit compares two inputs to indicate whether the two inputs are the same, or which input is larger or smaller, and is often used in arithmetic circuits. One-bit comparators have been proposed to circuit in quantum-dot cellular automata (QCA) technology which isone of the next generation technologies of circuit design. However, existing one-bit comparator circuits are inefficient in terms of circuit area and clock consumption. In this paper, we propose one-bit comparator using a multi-layer structure in QCA. Proposed circuit is possible to extendwires easily by designing the intersections of wires which is connected to the input cells to multi-layer structure. Unlike other wire-crossing techniques, it is easy to design circuits because it uses only one clock. The circuit area and clock consumption are reduced by using multi-layeredwiring-crossing parts. The performance of the proposed circuit is verified by comparing with the existing circuits.
机译:一位比较器电路比较两个输入以指示两个输入是否相同,或者输入更大或更小的输入,并且通常用于算术电路。 已经提出了一位比较器以Quantum-Dot蜂窝自动机(QCA)技术的电路,这是电路设计的下一代技术。 然而,在电路区域和时钟消耗方面,现有的单位比较器电路效率低。 在本文中,我们在QCA中使用多层结构提出单位比较器。 通过设计连接到输入单元的电线的交叉点来容易地延伸电路,该电路可以容易地延伸到多层结构。 与其他线路交叉技术不同,它易于设计电路,因为它仅使用一个时钟。 通过使用多层潜入的交叉部分减少了电路区域和时钟消耗。 通过与现有电路比较来验证所提出的电路的性能。

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