Managing Contention for Shared Resources on Multicore Processors

摘要

Contention for caches, memory controllers, and interconnects can be alleviated by contention-aware scheduling algorithms. Modern multicore systems are designed to allow clusters of cores to share various hardware structures, such as LLCs (last-level caches; for example, L2 or L3), memory controllers, and interconnects, as well as prefetching hardware. We refer to these resource-sharing clusters as memory domains, because the shared resources mostly have to do with the memory hierarchy. Figure 1 provides an illustration of a system with two memory domains and two cores per domain.