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首页> 外文期刊>ACM SIGPLAN Notices: A Monthly Publication of the Special Interest Group on Programming Languages >Versatile system-level memory-aware platform description approach for embedded MPSoCs
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Versatile system-level memory-aware platform description approach for embedded MPSoCs

机译:嵌入式MPSoC的多功能系统级内存感知平台描述方法

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摘要

In this paper, we present a novel system modeling language which targets primarily the development of source-level multiprocessor memory aware optimizations. In contrast to previous system modeling approaches this approach tries to model the whole system and especially the memory hierarchy in a structural and semantically accessible way. Previous approaches primarily support generation of simulators or retargetable code selectors and thus concentrate on pure behavioral models or describe only the processor instruction set in a semantically accessible way, A simple, database-like, interface is offered to the optimization developer, which in conjunction with the MACCv2 framework enables rapid development of source-level architecture independent optimizations.
机译:在本文中,我们提出了一种新颖的系统建模语言,该语言主要针对源级多处理器内存感知优化的开发。与以前的系统建模方法相比,此方法尝试以结构化和语义可访问的方式对整个系统,尤其是内存层次结构进行建模。先前的方法主要支持生成模拟器或可重新定向的代码选择器,从而专注于纯行为模型或以语义可访问的方式描述处理器指令集。为优化开发人员提供了一个简单的,类似于数据库的界面,该界面与MACCv2框架可快速开发独立于源代码级架构的优化。

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