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首页> 外文期刊>Electrochimica Acta >Minimizing Artifacts in Three-electrode Double Layer Capacitance Measurements Caused by Stray Capacitances
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Minimizing Artifacts in Three-electrode Double Layer Capacitance Measurements Caused by Stray Capacitances

机译:最小化由杂散电容引起的三电极双层电容测量中的伪像

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摘要

We analyze the influence of stray capacitances on three-electrode electrochemical impedance measurements with ion-blocking electrodes. This setup is widely used for double layer capacitance measurements. The analysis is based on a three-terminal equivalent network and reveals that stray capacitances lead to different types of capacitive and inductive artifacts. We show that the type of artifact depends strongly on (i) the positioning of the reference electrode between the working and the counter electrode and (ii) on ratio of the double layer capacitance of the working electrode to the stray capacitances. We compare the theoretical results to experimental results obtained for the double layer capacitance of the working electrode in three electrochemical cells with different areas and positions of the electrodes. On the basis of this work, we give advice on how to minimize and/or correct three-electrode artifacts in double layer capacitance measurements. (C) 2015 Elsevier Ltd. All rights reserved.
机译:我们分析了杂散电容对带有离子阻挡电极的三电极电化学阻抗测量的影响。此设置广泛用于双层电容测量。该分析基于一个三端等效网络,揭示了杂散电容会导致不同类型的电容性和电感性伪影。我们显示出伪影的类型在很大程度上取决于(i)参考电极在工作电极和对电极之间的位置,以及(ii)工作电极的双层电容与杂散电容之比。我们将理论结果与实验结果进行了比较,实验结果是在具有不同面积和位置的三个电化学电池中工作电极的双层电容。在这项工作的基础上,我们提供有关如何在双层电容测量中最小化和/或校正三电极伪像的建议。 (C)2015 Elsevier Ltd.保留所有权利。

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