A generation method for an interrupt controller in application specific instruction-set processor design

摘要

In this paper, interrupt controller generation method for application specific instruction-set processor (ASIP) is proposed. First, interrupts and their handling mechanisms are classified into several categories. Next, a target processor model which support interrupts is generalized. Using the processor model, a generation method previously proposed is extended to support the generation of processors with interrupts. In order to evaluate the effectiveness of the proposed method, two kinds of MIPS R3000 compatible processors were designed, where one is a processor without any interrupt, and the other is with interrupts. Logic synthesis results show that the overhead in design quality of the processor with interrupts was shout 4% compared with that of the other.