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首页> 外文期刊>Journal of Semiconductors >Two-dimensional parasitic capacitance extraction for integrated circuit with dual discrete geometric methods
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Two-dimensional parasitic capacitance extraction for integrated circuit with dual discrete geometric methods

机译:用双重离散几何方法提取集成电路的二维寄生电容

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摘要

Capacitance extraction is one of the key issues in integrated circuits and also a typical electrostatic problem. The dual discrete geometric method (DGM) is investigated to provide relative solutions in two-dimensional unstructured mesh space. The energy complementary characteristic and quick field energy computation thereof based on it are emphasized. Contrastive analysis between the dual finite element methods and the dual DGMs are presented both from theoretical derivation and through case studies. The DGM, taking the scalar potential as unknown on dual interlocked meshes, with simple form and good accuracy, is expected to be one of the mainstreaming methods in associated areas.
机译:电容提取是集成电路中的关键问题之一,也是典型的静电问题。对偶离散几何方法(DGM)进行了研究,以提供二维非结构化网格空间中的相对解。强调了能量互补特性及其快速场能量计算。通过理论推导和案例研究,提出了双有限元方法与双DGM的对比分析。 DGM以双联锁网格的标量势为未知,具有简单的形式和良好的精度,有望成为相关领域的主流方法之一。

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