An efficient architecture for designing reverse converters based on a general three-moduli set

摘要

In this paper, a high-speed, low-cost and efficient design of reverse converter for the general three-moduli set (2(alpha), 2(beta) - 1, 2(beta) + 1) where alpha < beta is presented. The simple proposed architecture consists of a carry save adder (CSA) and a modulo adder. As a result it can be efficiently implemented in VLSI circuits. The values of alpha and beta are set in order to provide the desired dynamic range and also to obtain a balanced moduli set. Based on the above, two new moduli sets {2(n+k), 2(2n) - 1, 2(2n) + 1} and {2(2n-1), 2(2n+1) - 1, 2(2n+1) + 1}, which are the special cases of the moduli set (2(alpha), 2(beta) - 1, 2(beta) + 1) are proposed. The reverse converters for these new moduli sets are derived from the proposed general architecture with better performance compared to the other reverse converters for moduli sets with similar dynamic range. (C) 2008 Published by Elsevier B.V.