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Efficient field-programmable gate array implementation of CCSDS 121.0-B-2 lossless data compression algorithm for image compression

机译:CCSDS 121.0-B-2图像压缩的无损数据压缩算法的高效现场可编程门阵列实现

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The Consultative Committee for Space Data Systems (CCSDS) 121.0-B-2 lossless data compression standard defines a lossless adaptive source coding algorithm which is applicable to a wide range of imaging and nonimaging data. We introduce a field-programmable gate array (FPGA) implementation of CCSDS 121.0-B-2 as an intellectual property (IP) core with the following features: (a) it is enhanced with a two-dimensional (2-D) second-order predictor making it more suitable for image compression, (b) it is enhanced with near-lossless compression functionality, (c) its parallel, pipelined architecture provides high data-rate performance with a maximum achievable throughput of 205 Msamples/s (3.2 Gbps at 16 bit) when targeting the Xilinx Virtex-5QV FPGA, and (d) it requires very low FPGA resources. When mission requirements impose lossless image compression, the CCSDS 121.0-B-2 IP core provides a very low implementation cost solution. According to European Space Agency PROBA-3 Bridging Phase, the CCSDS 121.0-B-2 IP core will be implemented in a Microsemi RTAX2000 FPGA, hosted in the data processing unit of the Coronagraph Control Box, of the Association of Spacecraft for Polarimetric and Imaging Investigation of the Corona of the Sun Coronagraph System Payload. To the best of our knowledge, it is the fastest FPGA implementation of CCSDS 121.0-B-2 to date, also including a 2-D second-order predictor making it more suitable for image compression. (C) 2015 Society of Photo-Optical Instrumentation Engineers (SPIE)
机译:空间数据系统协商委员会(CCSDS)121.0-B-2无损数据压缩标准定义了一种无损自适应源编码算法,该算法适用于各种成像和非成像数据。我们介绍了CCSDS 121.0-B-2的现场可编程门阵列(FPGA)实现,它是具有以下功能的知识产权(IP)核心:(a)通过二维(2-D)第二种增强功能-顺序预测器使其更适合于图像压缩,(b)借助近乎无损的压缩功能进行了增强,(c)其并行,流水线架构提供了高数据速率性能,最大可达到205 Msamples / s(3.2 Gbps)的吞吐量(针对16位)(针对Xilinx Virtex-5QV FPGA),并且(d)它需要非常低的FPGA资源。当任务要求施加无损图像压缩时,CCSDS 121.0-B-2 IP内核提供了非常低的实施成本解决方案。根据欧洲航天局PROBA-3桥接阶段的规定,CCSDS 121.0-B-2 IP核将在Microsemi RTAX2000 FPGA中实现,该FPGA托管在航天器偏振与成像协会日冕仪控制箱的数据处理单元中太阳日冕仪系统有效载荷的电晕研究。据我们所知,它是迄今为止CCSDS 121.0-B-2最快的FPGA实现,还包括一个二维二阶预测器,使其更适合于图像压缩。 (C)2015年光电仪器工程师协会(SPIE)

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