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首页> 外文期刊>WSEAS Transactions on Communications >Small Size Defected Ground Structure (DGS) Coupled Resonator Band Pass Filters with Capacitor Loaded Slot Using FDTD Method
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Small Size Defected Ground Structure (DGS) Coupled Resonator Band Pass Filters with Capacitor Loaded Slot Using FDTD Method

机译:采用FDTD方法的带电容器加载槽的小尺寸挠性接地结构(DGS)耦合谐振器带通滤波器

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摘要

This paper presents a design of a small size second and third order band pass coupled resonator filters by using finite difference time domain method (FDTD). Two of the proposed filters consist of compact folded DGS resonators, the other consists of compact rectangular DGS resonators and a lumped capacitor is combined within the slot of each filter. The insertion of lumped capacitor within resonators increases the effective capacitance, and reduces the resonant frequency, so the dimensions of the filter will reduce and the performance of the filter will be improved by enhancing the energy stored in the resonator. The resonance bandwidth is decreased leading to increasing the resonator quality factor. A second order band pass filter with centre frequency of 2.4 GHz has been designed, fabricated and measured. The filter has a wide stop band with a rejection higher than 20 dB up to more than 10 GHz. Insertion loss of less than 0.7 dB is achieved within the pass band. Another second order band pass filter with centre frequency of 3.1 GHz has been designed, fabricated, and measured. The filter has a wide stop band with a rejection higher than 20 dB up to more than 10 GHz. Insertion loss of less than 0.8 dB has been achieved within the pass band. It is found that, the experimental results agree well with the EM-simulation and FDTD simulation results. Finally, a third order band pass filter with center frequency of 2.4GHZ with single transmission zero at 2.61 GHz is designed and simulated. The filter has pass band from 2.3 to 2.52 GHz and wide stop band with rejection higher than 20 dB up to more than 8GHZ, and insertion loss lower than 1 dB is achieved within pass band.
机译:本文提出了一种使用有限差分时域方法(FDTD)的小型二阶和三阶带通耦合谐振器滤波器的设计。建议的两个滤波器由紧凑的折叠DGS谐振器组成,另一个由紧凑的矩形DGS谐振器组成,并且集总电容器组合在每个滤波器的插槽内。集总电容器在谐振器中的插入增加了有效电容,并降低了谐振频率,因此滤波器的尺寸将减小,并且通过增强存储在谐振器中的能量,滤波器的性能将得到改善。谐振带宽减小,导致谐振器品质因数增加。已经设计,制造和测量了中心频率为2.4 GHz的二阶带通滤波器。该滤波器具有很宽的阻带,在超过10 GHz的频率下,其抑制比高于20 dB。在通带内可实现小于0.7 dB的插入损耗。已经设计,制造和测量了另一个中心频率为3.1 GHz的二阶带通滤波器。该滤波器具有很宽的阻带,在超过10 GHz的频率下,抑制比高于20 dB。在通带范围内已实现了小于0.8 dB的插入损耗。结果表明,实验结果与EM仿真和FDTD仿真结果吻合良好。最后,设计并仿真了中心频率为2.4GHZ且在2.61 GHz处具有单传输零的三阶带通滤波器。该滤波器的通带范围为2.3至2.52 GHz,阻带范围宽,抑制比高于20 dB,最高可达8GHZ,并且通带内的插入损耗低于1 dB。

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