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Symbolic Model Checking of Extended Finite State Machines with Linear Constraints over Integer Variables

机译:具有整数变量线性约束的扩展有限状态机的符号模型检查

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We propose a symbolic model checking algorithm for a class of extended finite state machines equipped with integer variables (FSM/int). An FSM/int has several constraints on variable assignments, such as a variable of FSM/int keeps its value until the control visits at the definition transition and new value is fed via external input. Our model checking algorithm verifies whether an FSM/int satisfies a property described in CTL-like expressions over integer variables. We have implemented a model checker, and verified that blackjack dealer circuits and a packet multiplex protocol satisfy some designated properties. We have found that the verification of systems with 100 states and 10 integer variables can be carried out in a few seconds in most cases (in the worst case, a few minutes).
机译:我们为配备整数变量(FSM / int)的一类扩展有限状态机提出了一种符号模型检查算法。 FSM / int对变量分配有一些约束,例如FSM / int的变量会保持其值,直到控件在定义转换时访问并通过外部输入提供新值为止。我们的模型检查算法可验证FSM / int是否满足整数变量上类似CTL的表达式中描述的属性。我们已经实现了模型检查器,并验证了二十一点分发器电路和分组多路复用协议满足某些指定的属性。我们发现,在大多数情况下,可以在几秒钟内完成对具有100个状态和10个整数变量的系统的验证(在最坏的情况下,则是几分钟)。

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