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High-speed digital scan converter for high-frequency ultrasound sector scanners

机译:用于高频超声扇形扫描仪的高速数字扫描转换器

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摘要

This paper presents a high-speed digital scan converter (DSC) capable of providing more than 400 images per second, which is necessary to examine the activities of the mouse heart whose rate is 5-10 beats per second. To achieve the desired high-speed performance in cost-effective manner, the DSC developed adopts a linear interpolation algorithm in which two nearest samples to each object pixel of a monitor are selected and only angular interpolation is performed. Through computer simulation with the Field II program, its accuracy was investigated by comparing it to that of bilinear interpolation known as the best algorithm in terms of accuracy and processing speed. The simulation results show that the linear interpolation algorithm is capable of providing an acceptable image quality, which means that the difference of the root mean square error (RMSE) values of the linear and bilinear interpolation algorithms is below 1%, if the sample rate of the envelope samples is at least four times higher than the Nyquist rate for the baseband component of echo signals. The designed DSC was implemented with a single FPGA (Stratix EP1S60F1020C6, Altera Corporation, San Jose, CA) on a DSC board that is a part of a high-speed ultrasound imaging system developed. The temporal and spatial resolutions of the implemented DSC were evaluated by examining its maximum processing time with a time stamp indicating when an image is completely formed and wire phantom testing, respectively. The experimental results show that the implemented DSC is capable of providing images at the rate of 400 images per second with negligible processing error. (C) 2008 Elsevier B.V. All rights reserved.
机译:本文提出了一种高速数字扫描转换器(DSC),它能够每秒提供400张以上的图像,这对于检查每秒5-10次搏动的小鼠心脏的活动是必不可少的。为了以经济有效的方式实现所需的高速性能,DSC开发了一种线性插值算法,其中选择了两个最接近监视器目标像素的样本,并且仅执行角度插值。通过使用Field II程序进行计算机仿真,将其准确性与在精度和处理速度方面被称为最佳算法的双线性插值进行了比较,从而研究了其准确性。仿真结果表明,线性插值算法能够提供可接受的图像质量,这意味着,如果采样率达到1%,则线性和双线性插值算法的均方根误差(RMSE)值之差小于1%。对于回波信号的基带分量,包络采样至少比奈奎斯特速率高四倍。设计的DSC是在DSC板上使用单个FPGA(Stratix EP1S60F1020C6,Altera Corporation,加利福尼亚州圣何塞)实现的,该DSC板上是开发的高速超声成像系统的一部分。已实现的DSC的时间和空间分辨率是通过检查其最大处理时间(带有指示何时完全形成图像的时间戳)和线模测试进行评估的。实验结果表明,所实现的DSC能够以每秒400张图像的速度提供图像,并且处理误差可以忽略不计。 (C)2008 Elsevier B.V.保留所有权利。

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