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首页> 外文期刊>IEEE transactions on very large scale integration (VLSI) systems >High-performance and low-power conditional discharge flip-flop
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High-performance and low-power conditional discharge flip-flop

机译:高性能和低功耗条件放电触发器

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摘要

In this paper, high-performance flip-flops are analyzed and classified into two categories: the conditional precharge and the conditional capture technologies. This classification is based on how to prevent or reduce the redundant internal switching activities. A new flip-flop is introduced: the conditional discharge flip-flop (CDFF). It is based on a new technology, known as the conditional discharge technology. This CDFF not only reduces the internal switching activities, but also generates less glitches at the output, while maintaining the negative setup time and small D-to-Q delay characteristics. With a data-switching activity of 37.5%, the proposed flip-flop can save up to 39% of the energy with the same speed as that for the fastest pulsed flip-flops.
机译:本文对高性能触发器进行了分析,并将其分为两类:条件预充电和条件捕获技术。该分类基于如何防止或减少冗余的内部交换活动。引入了一种新的触发器:条件放电触发器(CDFF)。它基于一种称为条件放电技术的新技术。该CDFF不仅减少了内部开关活动,而且在保持负建立时间和较小的D-Q延迟特性的同时,在输出端产生的毛刺更少。拟议的触发器具有37.5%的数据交换活性,与最快的脉冲触发器相同的速度可以节省多达39%的能量。

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