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IEEE Standard 1500 Compliance Verification for Embedded Cores

机译:嵌入式内核的IEEE标准1500一致性验证

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Core-based design and reuse are the two key elements for an efficient system-on-chip (SoC) development. Unfortunately, they also introduce new challenges in SoC testing, such as core test reuse and the need of a common test infrastructure working with cores originating from different vendors. The IEEE 1500 Standard for Embedded Core Testing addresses these issues by proposing a flexible hardware test wrapper architecture for embedded cores, together with a core test language (CTL) used to describe the implemented wrapper functionalities. Several intellectual property providers have already announced IEEE Standard 1500 compliance in both existing and future design blocks. In this paper, we address the problem of guaranteeing the compliance of a wrapper architecture and its CTL description to the IEEE Standard 1500. This step is mandatory to fully trust the wrapper functionalities in applying the test sequences to the core. We present a systematic methodology to build a verification framework for IEEE Standard 1500 compliant cores, allowing core providers and/or integrators to verify the compliance of their products (sold or purchased) to the standard.
机译:基于内核的设计和重用是有效的片上系统(SoC)开发的两个关键要素。不幸的是,它们还给SoC测试带来了新的挑战,例如核心测试重用以及需要使用来自不同供应商的核心的通用测试基础架构。针对嵌入式核心测试的IEEE 1500标准通过为嵌入式核心提出灵活的硬件测试包装器体系结构以及用于描述实现的包装器功能的核心测试语言(CTL),解决了这些问题。几家知识产权提供商已经宣布在现有和将来的设计模块中均符合IEEE标准1500。在本文中,我们解决了保证包装器体系结构及其CTL描述符合IEEE标准1500的问题。必须执行此步骤,以完全信任将测试序列应用于核心的包装器功能。我们提供了一种系统的方法,可为符合IEEE Standard 1500的内核建立验证框架,从而使核心提供商和/或集成商可以验证其产品(已售或已购买)是否符合标准。

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