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Arithmetic-Based Binary-to-RNS Converter Modulo ${{2^{n}{pm}k}}$ for $jn$ -bit Dynamic Range

机译:基于算术的Binary-to-RNS转换器模块 $ {{2 ^ {n} {pm} k}} $ $ jn $ 位动态范围的公式>

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摘要

In this brief, a read-only-memoryless structure for binaryto-residue number system (RNS) conversion modulo (2 ±k} is proposed. This structure is based only on adders and constant multipliers. This brief is motivated by the existing (2 ± k} binary-to-RNS converters, which are particular inefficient for larger values of n. The experimental results obtained for 4n and 8n bits of dynamic range suggest that the proposed conversion structures are able to significantly improve the forward conversion efficiency, with an AT metric improvement above 100%, regarding the related state of the art. Delay improvements of 2.17 times with only 5% area increase can be achieved if a proper selection of the (2 ± k} moduli is performed.
机译:在本简报中,提出了一种二进制数-残数系统(RNS)转换模(2±k}的只读无存储器结构。该结构仅基于加法器和常数乘法器。 ±k}二进制至RNS转换器,对于较大的n值而言效率特别低。针对4n和8n位动态范围的实验结果表明,所提出的转换结构能够显着提高正向转换效率,并且具有就现有技术而言,AT度量改进超过100%,如果适当选择(2±k}模,则可以实现2.17倍的延迟改进,仅增加5%的面积。

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