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首页> 外文期刊>IEEE transactions on very large scale integration (VLSI) systems >Determining Application-Specific Knowledge for Improving Robustness of Sequential Circuits
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Determining Application-Specific Knowledge for Improving Robustness of Sequential Circuits

机译:确定特定应用知识以提高时序电路的鲁棒性

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Due to their shrinking feature sizes as well as environmental influences, such as high-energy radiation, electrical noise, and particle strikes, integrated circuits are getting more vulnerable to transient faults. Accordingly, how to make those circuits more robust has become an essential step in today's design flows. Methods increasing the robustness of circuits against these faults already exist for a long period of time but either introduce huge additional logic, change the timing behavior of the circuit, or are applicable for dedicated circuits such as microprocessors only. In this paper, we propose an alternative method, which overcomes these drawbacks by determining application-specific knowledge of the circuit, namely the relations of flip-flops and when they assume the same value. By this, we exploit partial redundancies, which are inherent in most circuits anyway (even the optimized ones), to frequently compare the circuit signals for their correctness-eventually leading to an increased robustness. Since determining the correspondingly needed information is a computationally hard task, formal methods, such as bounded model checking, satisfiability-based automatic test pattern generation, and binary decision diagrams, are utilized for this purpose. The resulting methodology requires only a slight increase in additional hardware, does only influence the timing behavior of the circuit negligibly, and is automatically applicable to arbitrary circuits. Experimental evaluations confirm these benefits.
机译:由于其尺寸缩小,以及高能辐射,电噪声和微粒撞击等环境影响,集成电路变得更容易受到瞬态故障的影响。因此,如何使这些电路更坚固耐用已成为当今设计流程中必不可少的步骤。提高电路抵抗这些故障的鲁棒性的方法已经存在了很长一段时间,但是这些方法要么引入了巨大的附加逻辑,要么改变了电路的时序特性,要么仅适用于诸如微处理器之类的专用电路。在本文中,我们提出了另一种方法,该方法通过确定电路的特定应用知识(即触发器的关系以及它们取相同值时的关系)来克服这些缺点。通过这种方式,我们利用了无论如何在大多数电路中都是固有的部分冗余(即使是优化的冗余),也可以经常比较电路信号的正确性,最终提高鲁棒性。由于确定相应需要的信息是一项艰巨的计算任务,因此为此目的采用了形式化的方法,例如有界模型检查,基于可满足性的自动测试模式生成和二进制决策图。所产生的方法仅需稍微增加额外的硬件,只会对电路的定时行为产生微不足道的影响,并且自动适用于任意电路。实验评估证实了这些好处。

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