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Fault-tolerant design and testing of USB2.0 peripheral devices IP core system

机译:USB2.0外围设备IP核心系统的容错设计和测试

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摘要

Universal serial bus 2.0 (USB2.0) is a kind of mainstream interface technology. The traditional USB developing is only to develop USB peripheral devices. For the USB2.0 peripheral devices IP core system that has wide application foreground, some interference inevitably exists in signal transmitting. Some fault-tolerant design and test methods must be adopted in order to correctly transmit and receive data. Combining with a project, this paper introduces in detail about measures, hardware implement, and test methods of fault-tolerant design about USB2.0 peripheral devices IP core system. Fault-tolerant design measures, noise reduction measures of signal processing, fault-tolerant methods about data encode and decode, package identification (ID) field fault-tolerant methods, and cyclic redundancy checks fault-tolerant methods are discussed. The paper also presents some hardware implement methods about fault-tolerant design of data decode and test methods about fault-tolerant design of USB2.0 IP core system. These methods can offer the reference for development of USB2.0 system in all kinds of electronics instrumentations.
机译:通用串行总线2.0(USB2.0)是一种主流接口技术。传统的USB开发仅是开发USB外围设备。对于具有广泛应用前景的USB2.0外围设备IP核系统,在信号传输中不可避免地会存在一些干扰。为了正确发送和接收数据,必须采用一些容错设计和测试方法。结合项目,详细介绍了USB2.0外围设备IP核系统容错设计的措施,硬件实现和测试方法。讨论了容错设计措施,信号处理的降噪措施,有关数据编码和解码的容错方法,程序包标识(ID)字段容错方法以及循环冗余校验容错方法。本文还介绍了一些有关数据解码的容错设计的硬件实现方法以及有关USB2.0 IP核心系统的容错设计的测试方法。这些方法可为各种电子仪器中USB2.0系统的开发提供参考。

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