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Testability of the Safety Software based on Specification in Statechart

机译:基于Statechart中规范的安全软件的可测试性

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摘要

For hardware design, the testability is considered at the design stage to make the testing of the faulty components easy. The hidden faults in the software are exposed as certain conditions are met. The problem with software testing is that it is not easy to decide when enough testing have been performed. The stopping criteria for software testing have been either coverage criteria or certain reliability criteria. But if we can calculate the testability of the software, it can be used to support the stopping criteria, or to allow optimal resources to each software component according to their testability within limited resources. It can also be used to modify the software to have better testability. For safety system software, the software specification is increasingly prepared using formal methods having pre-defined notations with precise semantics. One of the methods that are widely used is the statechart that is based on the extended finite state machine (FSM). The statechart added concurrency, broadcasting, and hierarchy among the states to the extended FSM to enhance the descriptive power and avoid the state explosion problem. In this study, a method to evaluate the testability of software specification in statechart was proposed based on the number of test cases required, which could be used to evaluate the software in the early life cycle phase. The measure was applied for simple FSMs and simple hardware circuits.
机译:对于硬件设计,在设计阶段考虑了可测试性,以使故障组件的测试变得容易。满足某些条件后,软件中的隐藏故障就会暴露出来。软件测试的问题在于,很难确定何时执行了足够的测试。软件测试的停止标准是覆盖标准或某些可靠性标准。但是,如果我们可以计算软件的可测试性,则可以将其用于支持停止标准,或者根据有限资源中的每个软件组件的可测试性,为每个软件组件提供最佳资源。它还可以用于修改软件以具有更好的可测试性。对于安全系统软件,使用具有精确语义的预定义符号的形式方法越来越多地准备软件规范。广泛使用的方法之一是基于扩展有限状态机(FSM)的状态图。状态图将状态之间的并发,广播和层次结构添加到扩展的FSM中,以增强描述能力并避免状态爆炸问题。在这项研究中,根据所需的测试用例数量,提出了一种评估状态图中软件规范可测试性的方法,该方法可用于评估生命周期早期的软件。该措施适用于简单的FSM和简单的硬件电路。

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