机译:NoC中的高性能,高能效容错核心映射
Department of Electronics and Communication Engineering, National Institute of Technology Coa, India;
Department of Electronics and Communication Engineering, National Institute of Technology Coa, India;
Department of Electronics and Communication Engineering, National Institute of Technology Coa, India;
Network on Chip (NoC); Core; Fault tolerance; Spare placement; System on Chip (SoC);
机译:系统级容错核心映射和基于FPGA的NoC验证
机译:基于NoC的MPSoC上的高能效竞争感知应用程序映射和调度
机译:基于逻辑函数的自适应遗传算法的3D NOC节能映射
机译:HEFT:一种混合系统级框架,用于在基于NoC的MPSoC中实现高能效的容错能力
机译:高性能,高能效,可靠的片上网络(NoC)架构的设计。
机译:包含Noc4p的C末端的Noc域介导了Noc4p-Nop14p子模块的形成以及将其并入SSU Processome中。
机译:KTS:基于NOC的许多核的实时映射算法