Thin silicon layer p-channel SOI/PSOI LDMOS with interface n~+-islands for high voltage application

摘要

A novel thin silicon layer p-channel SOI/PSOI LDMOS with interface n~+-islands (INI PLDMOS) is studied in this paper. Interface n~+-islands can not only accumulate interface charges to enhance the electric field of buried oxide layer (BOX) (E_(BOX)) and achieve a high breakdown voltage (BV), but also form double-RESURF effect with p- drift region and improve the trade-off of the specific on-resistance (R_(on,sp)) and BV. The work mechanism of the proposed p-channel LDMOS is discussed. BV＞ 1000 V is obtained for the INI PLDMOS based on a 1.5-μm silicon layer and 2-μm BOX.