Summer of ''81

摘要

On 1981, the idea that one could synthesize logic automatically from an RTL description into an implementation of gates and flip-flops was not new. At IBM, there were already several efforts under way at that time, and there had been earlier efforts in the same direction by Se June Hong, John Paul Roth, and others. Roth had written a program that was used to create a logic network from an RTL description. There was no attempt to optimize the network, possibly because it was thought to be too hard to compete with manual implementations. This program was mainly used to create a golden model for comparison with handcrafted logic, which was the mode of implementation at the time. There was a companion program, called SAS at IBM [8], which was used to do the checking. It was a fairly universal rule at IBM that before any logic was released in a product, one should “SAS” it. This program was basically an early version of a SAT solver and was remarkably capable for the time. It was finally published in the IBM Journal of Research and Development [24], but for a long time this program was not documented except in the IBM Technical Disclosure Bulletin (see [23]). In 1974, Hong and Ostapko [16] had created an early programmable logic array (PLA) minimization program, MINI, which used some very innovative ideas and was the leading PLA minimization program. Of course, in the early 1960s, Quine and McCluskey had the first ideas on minimization of sum-of-product expressions (SOPs).