Clocking Wireline Systems: An Overview of Wireline Design Techniques

摘要

Over the last several decades, digital communications technologies combined with integrated circuit scaling trends have enabled the microelectronic industry to dramatically scale the bandwidth of high-loss networks such as DSL and Ethernet. These channel-limited applications depend on sophisticated equalization techniques to push well beyond the uncompensated bandwidth of the system. And in the last two decades, short-distance wireline links used for chip-to-chip communication applications have enjoyed equally impressive data rate scaling??from a few hundred megabits per second per lane to multigigabits per second in products with volumes in the billions of units.