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A novel sensor cell architecture and sensing circuit scheme forcapacitive fingerprint sensors

机译:电容指纹传感器的新型传感器单元架构和传感电路方案

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摘要

Novel capacitive fingerprint sensor techniques are described. Wenpropose a novel sensor cell architecture to obtain high sensitivity,nwide output dynamic range, and contrast adjustment. For thenarchitecture, three circuit techniques were developed. A sensing circuitnwith a differential charge-transfer amplifier enhances sensitivity whilenit suppresses the influence of the parasitic capacitance of the sensornplate. A wide output dynamic range, which is needed for high-resolutionnanalog-to-digital (A/D) conversion, is achieved by transforming thensensed voltage to a time-variant signal. Finally, the sensing circuitnincludes an automatic contrast enhancement scheme that uses anvariable-threshold Schmitt trigger circuit to distinguish the ridges andnvalleys of a fingerprint well. The characteristics of a test chip usingnthe 0.5-Μm CMOS process show a high sensitivity to less than 80 fF asnthe detected signal, while the variation of the output signal isnsuppressed to less than 3% at ±20% variation of the parasiticncapacitance. The dynamic range of the time-variant signal is 70 Μs,nwhich is wide enough for A/D conversion. The automatic contrastnenhancement scheme widens the time-variant signal 100 Μs more. Ansingle-chip fingerprint sensor/identifier LSI using the proposed sensingncircuit scheme confirms the scheme's effectiveness
机译:描述了新颖的电容指纹传感器技术。 Wen提出了一种新颖的传感器单元架构,以获得高灵敏度,宽输出动态范围和对比度调节。对于这种架构,开发了三种电路技术。带有差分电荷转移放大器的传感电路可提高灵敏度,同时可抑制传感器板的寄生电容的影响。通过将感测到的电压转换为时变信号,可以实现高分辨率模拟到数字(A / D)转换所需的宽输出动态范围。最后,感测电路包括自动对比度增强方案,该方案使用可变阈值施密特触发器电路来区分指纹阱的隆起和谷底。使用0.5μmCMOS工艺的测试芯片的特性表明,在检测到的信号小于80 fF时具有很高的灵敏度,而在寄生电容为±20%的情况下,输出信号的变化却被抑制为小于3%。时变信号的动态范围为70毫秒,足够用于A / D转换。自动对比增强方案将时变信号扩展了100毫秒以上。使用拟议中的感应电路方案的单芯片指纹传感器/识别器LSI证实了该方案的有效性

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