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首页> 外文期刊>IEEE Journal of Solid-State Circuits >A 32-bit PowerPC system-on-a-chip with support for dynamic voltage scaling and dynamic frequency scaling
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A 32-bit PowerPC system-on-a-chip with support for dynamic voltage scaling and dynamic frequency scaling

机译:32位PowerPC片上系统,支持动态电压缩放和动态频率缩放

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摘要

A PowerPC system-on-a-chip processor which makes use of dynamic voltage scaling and on-the-fly frequency scaling to adapt to the dynamically changing performance demands and power consumption constraints of high-content, battery powered applications is described. The PowerPC core and caches achieve frequencies as high as 380 MHz at a supply of 1.8 V and active power consumption as low as 53 mW at a supply of 1.0 V. The system executes up to 500 MIPS and can achieve standby power as low as 54 ΜW. Logic supply changes as fast as 10 mV/Μs are supported. A low-voltage PLL supplied by an on-chip regulator, which isolates the clock generator from the variable logic supply, allows the SOC to operate continuously while the logic supply voltage is modified. Hardware accelerators for speech recognition, instruction-stream decompression and cryptography are included in the SOC. The SOC occupies 36 mm2 in a 0.18 Μm, 1.8 V nominal supply, bulk CMOS process.
机译:描述了一种PowerPC片上系统处理器,该处理器利用动态电压缩放和动态频率缩放来适应动态变化的性能需求和高容量,电池供电应用的功耗约束。 PowerPC内核和高速缓存在1.8 V的电源下可达到380 MHz的频率,在1.0 V的电源下可实现低至53 mW的有功功耗。该系统执行高达500 MIPS的功率,并且可以实现低至54的待机功率MW。支持的逻辑电源变化速度高达10 mV /Μs。片上稳压器提供的低压PLL将时钟发生器与可变逻辑电源隔离开来,允许SOC在修改逻辑电源电压的同时连续工作。 SOC中包含用于语音识别,指令流解压缩和加密的硬件加速器。 SOC在0.18微米,1.8 V标称电源的批量CMOS工艺中占地36 mm2。

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