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首页> 外文期刊>IEEE Journal of Solid-State Circuits >An OTA-Less Second-Order VCO-Based CT DeltaSigma Modulator Using an Inherent Passive Integrator and Capacitive Feedback
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An OTA-Less Second-Order VCO-Based CT DeltaSigma Modulator Using an Inherent Passive Integrator and Capacitive Feedback

机译:基于OTA的二阶VCO的CT Delta Sigma调制器使用固有的无源积分器和电容反馈

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摘要

Voltage-controlled oscillator (VCO)-based continuous-time $Delta Sigma $ modulators (CTDSMs) are deemed attractive for deep-scaled process. However, to realize high-order noise shaping, existing works still employ operational transconductance amplifiers (OTAs), which limits the benefits brought by the VCO. This article presents an OTA-less second-order VCO-based CTDSM featuring a hybrid passive-VCO architecture. It exploits the gain-efficient and scaling-friendly nature of the VCO integrator, enabling the use of a fully passive loop filter to increase the order with minimum power. The proposed architecture is realized in a low-cost, low-noise cascaded-integrator feedback structure that makes use of the parasitic effect of the VCO as an inherent passive stage. Fabricated in 40-nm CMOS, the prototype occupies 0.028 mm(2) of active area and consumes 590 $mu ext{W}$ when sampling at 330 MHz. The CTDSM achieved peak Walden figure of merits of 22 fJ/step with 68.7-dB signal to noise and distortion ratio (SNDR) over 6-MHz bandwidth.
机译:基于电压控制的振荡器(VCO)的连续时间$ Delta Sigma $调制器(CTDSMS)被视为对深度缩放过程有吸引力。然而,为了实现高阶噪声整形,现有的作品仍然采用操作跨导放大器(OTA),这限制了VCO带来的益处。本文介绍了一个少于二阶VCO的CTDSM,具有混合态VCO架构。它利用VCO积分器的节约效率和缩放友好性,使使用完全被动环路过滤器以增加最小功率的顺序。所提出的架构以低成本,低噪声级联积分器反馈结构实现,这些结构是利用VCO的寄生效应作为固有的无源级。在40-NM CMOS中制造,原型占用0.028 mm(2)的有效区域,并在330 MHz采样时消耗590美元 mu text {w} $。 CTDSM在68.7-DB信号上实现了22 FJ /步骤的峰值沃尔登人物,以68.7dB的噪声和失真率(SNDR)超过6-MHz带宽。

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