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首页> 外文期刊>Solid-State Circuits, IEEE Journal of >An On-Die All-Digital Power Supply Noise Analyzer With Enhanced Spectrum Measurements
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An On-Die All-Digital Power Supply Noise Analyzer With Enhanced Spectrum Measurements

机译:具有增强频谱测量功能的片上全数字电源噪声分析仪

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摘要

A scalable all-digital power supply noise analyzer with 20 GHz sampling bandwidth and 1 mV resolution is demonstrated in 32 nm CMOS technology for enabling low-cost low-power in-situ power supply noise measurements without dedicated clean supplies and clock sources. This subsampled averaging-based analyzer measures power supply noise in both the equivalent-time and frequency domains with low-resolution VCO-based ADCs. For equivalent-time measurements, the accurate impedance characterization of power delivery networks is simply done by measuring a clock-synchronized current-step response. For frequency-domain measurements, the digital random phase-noise accumulation technique is analyzed and verified to overcome the clock-and-noise correlation issue in autocorrelation measurements. In general large scale integrated circuits and systems, the entire power supply noise analyzer consumes negligible active and leakage powers because of the MHz-range sampling clock frequency and fully digital implementation with only hundreds of logic gates.
机译:在32 nm CMOS技术中展示了具有20 GHz采样带宽和1 mV分辨率的可扩展全数字电源噪声分析仪,该功能可实现低成本,低功耗的原位电源噪声测量,而无需专用的干净电源和时钟源。这种基于平均采样率的分析仪使用基于VCO的低分辨率ADC在等效时域和频域中测量电源噪声。对于等效时间测量,只需通过测量时钟同步电流阶跃响应即可完成功率传输网络的准确阻抗表征。对于频域测量,分析和验证了数字随机相位噪声累积技术,以克服自相关测量中的时钟噪声相关问题。在一般的大型集成电路和系统中,整个电源噪声分析仪消耗的有功功率和泄漏功率可忽略不计,这是因为MHz范围的采样时钟频率以及仅具有数百个逻辑门的全数字实现。

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