A 28-/37-/39-GHz Linear Doherty Power Amplifier in Silicon for 5G Applications

摘要

This paper presents the first 28-/37-/39-GHz linear Doherty power amplifier (PA) in silicon for broadband fifth-generation (5G) applications. We introduce a new transformerbased on-chip Doherty power combiner that can reduce the impedance transformation ratio (ITR) in power back-off (PBO) and, thus, improve the bandwidth and power-combining efficiency. We also devise a "driver-PA co-design" method that creates power-dependent uneven feeding in the Doherty PA and enhances the Doherty operation without any hardware overhead or bandwidth compromise. For the proof of concept, we implement a 28-/37-/39-GHz PA fully integrated in a standard 130-nm SiGe BiCMOS process, which occupies 1.8 mm(2). The PA achieves a 52% -3-dB small-signal S-21 bandwidth and a 40% -1-dB large-signal saturated output power (P-sat) bandwidth. At 28/37/39 GHz, the PA achieves + 16.8-/+ 17.1-/+ 17-dBm P-sat, + 15.2-/+ 15.5-/+ 15.4-dBm P-1 dB, and superior 1.72/1.92/1.62 times efficiency enhancement over class-B operation at 5.9-/6-/6.7-dB PBO. Moreover, the PA demonstrates multi-gigabit-per-second data rates with excellent efficiency and linearity for 64-quadrature amplitude modulation (64-QAM) in three millimeter-wave (mm-wave) 5G bands. This PA advances the state of the art for Doherty, wideband, and 5G silicon PAs in mm-wave bands. It supports drop-in upgrade for current PAs in existing mm-wave systems and opens doors to compact system solutions for future multiband 5G massive multiple-input multiple-output (MIMO) and phased-array platforms.