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Speeding up architectural simulations for high-performance processors

机译:加快高性能处理器的架构仿真

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Designing a high-performance microprocessor is extremely time-consuming, taking at least several years. In this article, the authors discuss these issues and propose a solution for each of them. As such, they present a new simulation methodology for designing high-performance microprocessors by combining several recently proposed techniques, such as statistical simulation, representative workload design, trace sampling, and reduced input sets. The major contribution of this study is to present a holistic view on speeding up the architectural design phase in which the above-mentioned techniques are integrated in one single architectural design framework. In this methodology, the authors first identify a region of interest in the huge design space through statistical simulation. As such, the authors conclude that this methodology can reduce the total simulation time considerably. In addition to presenting this new architectural modeling and simulation approach, a survey of related work of this fast-growing research field is presented.
机译:设计高性能微处理器非常耗时,至少要花费几年时间。在本文中,作者讨论了这些问题,并为每个问题提出了解决方案。这样,他们通过结合几种最近提出的技术(例如统计仿真,代表性工作量设计,跟踪采样和精简输入集),提出了一种用于设计高性能微处理器的新仿真方法。这项研究的主要贡献是提出了关于加快建筑设计阶段的整体观点,其中将上述技术集成在一个单一的建筑设计框架中。在这种方法中,作者首先通过统计仿真在巨大的设计空间中确定了感兴趣的区域。因此,作者得出结论,这种方法可以大大减少总的仿真时间。除了介绍这种新的体系结构建模和仿真方法之外,还介绍了这个快速发展的研究领域的相关工作的概况。

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