A simulation framework for code-level energy estimation of embedded soft-core processors

摘要

This contribution presents a simulation framework for code-level energy estimation of open-source MIPS-R2000, LEON3, and openMSP430 embedded soft-core processors. The method proposed in this work is generic and can be extended to other processors and architectures. The framework consists of two modules as follows. (i) An instruction-level power estimator module that estimates the average power consumption of individual machine instructions simulated using gate-level net-lists of the target processors. This module is used to create instruction-level power consumption databases of the target processor. (ii) A high-level energy estimation module parses the assembly code written for a target processor and gives the estimated energy consumed while taking the inherent data and control dependencies into consideration. Our proposed framework, therefore, provides rapid offline code-level energy estimation using simulations and avoids the low-level hardware estimation overheads. The energy estimation time efficiency of our proposed methodology is evaluated by using different benchmarks against the results of other existing energy estimation frameworks, such as SoftExplorer, TLM with the ISS-based simulation tool, SimplePower/WATTCH, and EPEM. These results indicate that our proposed framework is roughly one to two orders of magnitude faster in energy estimation. From the accuracy perspective, our energy estimations lie, on average, within 2% of those obtained from WATTCH. The proposed tool is especially useful in estimating the algorithmic energy efficiency of various codes targeted at low/moderate-end embedded systems, such as wireless sensor network nodes.